"State Assignment for Optimal Design of Monitored Self-Checking Sequential ..."

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

Rubin A. Parekhji, G. Venkatesh, Sunil D. Sherlekar (1993)

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DOI: 10.1109/ICVD.1993.669627

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Rubin A. Parekhji, G. Venkatesh, Sunil D. Sherlekar:
State Assignment for Optimal Design of Monitored Self-Checking Sequential Circuits. VLSI Design 1993: 15-20

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