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"Multilevel Factorization Technique for Pass Transistor Logic."

Arunita Jaekel, Graham A. Jullien, Subir Bandyopadhyay (1996)

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DOI: 10.1109/ICVD.1996.489630

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  dblp key:
  - conf/vlsid/JaekelJB96
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  persistent URL:
  - https://dblp.org/rec/conf/vlsid/JaekelJB96
Arunita Jaekel, Graham A. Jullien, Subir Bandyopadhyay:
Multilevel Factorization Technique for Pass Transistor Logic. VLSI Design 1996: 339-340

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