"Highly reliable and low-power nonvolatile cache memory with advanced ..."

Hiroki Noguchi et al. (2014)

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DOI: 10.1109/VLSIC.2014.6858403

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-21

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Hiroki Noguchi, Kazutaka Ikegami, Naoharu Shimomura, Tetsufumi Tanamoto, Junichi Ito, Shinobu Fujita:
Highly reliable and low-power nonvolatile cache memory with advanced perpendicular STT-MRAM for high-performance CPU. VLSIC 2014: 1-2

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