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"Hierarchical Retiming Including Pipelining."
Albert van der Werf et al. (1991)
- Albert van der Werf, B. T. McSweeney, Jef L. van Meerbergen, Paul E. R. Lippens, Wim F. J. Verhaegh:
Hierarchical Retiming Including Pipelining. VLSI 1991: 451-460
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