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ORCID"Technology Mapping for Area Optimized Quasi Delay Insensitive Circuits."
Bertrand Folco et al. (2005)
- Bertrand Folco, Vivian Brégier, Laurent Fesquet, Marc Renaudin:
Technology Mapping for Area Optimized Quasi Delay Insensitive Circuits. VLSI-SoC 2005: 55-69
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