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"An all-digital delay-locked loop for high-speed memory interface applications."

Shih-Lun Chen et al. (2014)

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DOI: 10.1109/VLSI-DAT.2014.6834900

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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  dblp key:
  - conf/vlsi-dat/ChenHSLL14
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  - https://dblp.org/rec/conf/vlsi-dat/ChenHSLL14
Shih-Lun Chen, Ming-Jing Ho, Yu-Ming Sun, Maung Wai Lin, Jung-Chin Lai:
An all-digital delay-locked loop for high-speed memory interface applications. VLSI-DAT 2014: 1-4

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