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"Parallel two step random walk algorithm to analyze VLSI power grid networks."

Satyabrata Dash et al. (2015)

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DOI: 10.1109/ISVDAT.2015.7208101

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  dblp key:
  - conf/vdat/DashBKTP15
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  persistent URL:
  - https://dblp.org/rec/conf/vdat/DashBKTP15
Satyabrata Dash, Vivek Bangera, Vinay B. Y. Kumar, Gaurav Trivedi, Sachin B. Patkar:
Parallel two step random walk algorithm to analyze VLSI power grid networks. VDAT 2015: 1-2

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