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"A buffer cache architecture for smartphones with hybrid DRAM/PCM memory."

Ye-Jyun Lin et al. (2015)

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DOI: 10.1109/NVMSA.2015.7304363

access: closed

type: Conference or Workshop Paper

metadata version: 2017-06-05

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  dblp key:
  - conf/nvmsa/LinYLW15
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  - https://dblp.org/rec/conf/nvmsa/LinYLW15
Ye-Jyun Lin, Chia-Lin Yang, Hsiang-Pang Li, Cheng-Yuan Michael Wang:
A buffer cache architecture for smartphones with hybrid DRAM/PCM memory. NVMSA 2015: 1-6

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