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"All-Digital ∆Σ TDC with Current-Starved Bi-Directional Gated ..."

Fei Yuan, Parth Parekh (2019)

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DOI: 10.1109/MWSCAS.2019.8885185

access: closed

type: Conference or Workshop Paper

metadata version: 2021-01-15

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  - https://dblp.org/rec/conf/mwscas/YuanP19a
Fei Yuan, Parth Parekh:
All-Digital ∆Σ TDC with Current-Starved Bi-Directional Gated Delay Line Time Integrator. MWSCAS 2019: 493-496

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