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ORCID"Low power test application with selective compaction in VLSI designs."
Dariusz Czysz, Janusz Rajski, Jerzy Tyszer (2012)
- Dariusz Czysz, Janusz Rajski, Jerzy Tyszer:
Low power test application with selective compaction in VLSI designs. ITC 2012: 1-10
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