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"A 20.5TOPS and 217.3GOPS/mm2 Multicore SoC with DNN Accelerator ..."

Yutaka Yamada et al. (2019)

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DOI: 10.1109/ISSCC.2019.8662459

access: closed

type: Conference or Workshop Paper

metadata version: 2019-03-12

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  dblp key:
  - conf/isscc/YamadaSTIHHMHMU19
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  - https://dblp.org/rec/conf/isscc/YamadaSTIHHMHMU19
Yutaka Yamada, Toru Sano, Yasuki Tanabe, Yutaro Ishigaki, Soichiro Hosoda, Fumihiko Hyuga, Akira Moriya, Ryuji Hada, Atsushi Masuda, Masato Uchiyama, Tomohiro Koizumi, Takanori Tamai, Nobuhiro Sato, Jun Tanabe, Katsuyuki Kimura, Ryusuke Murakami, Takashi Yoshikawa:
A 20.5TOPS and 217.3GOPS/mm² Multicore SoC with DNN Accelerator and Image Signal Processor Complying with ISO26262 for Automotive Applications. ISSCC 2019: 132-134

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