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"A 32Gb/s 133mW PAM-4 transceiver with DFE based on adaptive clock phase ..."

Liangxiao Tang et al. (2018)

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DOI: 10.1109/ISSCC.2018.8310210

access: closed

type: Conference or Workshop Paper

metadata version: 2023-06-26

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Liangxiao Tang, Weixin Gai, Linqi Shi, Xiao Xiang, Kai Sheng, Ai He:
A 32Gb/s 133mW PAM-4 transceiver with DFE based on adaptive clock phase and threshold voltage in 65nm CMOS. ISSCC 2018: 114-116

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