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"8.1 An 80nW retention 11.7pJ/cycle active subthreshold ARM Cortex-M0+ ..."

James Myers et al. (2015)

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DOI: 10.1109/ISSCC.2015.7062967

access: closed

type: Conference or Workshop Paper

metadata version: 2022-01-03

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James Myers, Anand Savanth, David Howard, Rohan Gaddh, Pranay Prabhat, David Flynn:
8.1 An 80nW retention 11.7pJ/cycle active subthreshold ARM Cortex-M0+ subsystem in 65nm CMOS for WSN applications. ISSCC 2015: 1-3

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