"A 60Gb/s PAM-4 ADC-DSP Transceiver in 7nm CMOS with SNR-Based Adaptive ..."

Marc-Andre LaCroix et al. (2019)

> Home

Details and statistics

DOI: 10.1109/ISSCC.2019.8662322

access: closed

type: Conference or Workshop Paper

metadata version: 2019-03-12

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/isscc/LaCroixWLHLKNPC19
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/isscc/LaCroixWLHLKNPC19
Marc-Andre LaCroix, Henry Wong, Yun Hua Liu, Huong Ho, Semyon Lebedev, Petar Krotnev, Dorin Alexandru Nicolescu, Dmitry Petrov, Carlos Carvalho, Stephen Alie, Euhan Chong, Faisal Ahmed Musa, Davide Tonietto:
A 60Gb/s PAM-4 ADC-DSP Transceiver in 7nm CMOS with SNR-Based Adaptive Power Scaling Achieving 6.9pJ/b at 32dB Loss. ISSCC 2019: 114-116

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.