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"A 188fsrms-Jitter and -243d8-FoMjitter 5.2GHz-Ring-DCO-Based Fractional-N ..."

Chanwoong Hwang et al. (2022)

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DOI: 10.1109/ISSCC42614.2022.9731646

access: closed

type: Conference or Workshop Paper

metadata version: 2022-03-21

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  dblp key:
  - conf/isscc/HwangPSC22
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Chanwoong Hwang, Hangi Park, Taeho Seong, Jaehyouk Choi:
A 188fsrms-Jitter and -243d8-FoMjitter 5.2GHz-Ring-DCO-Based Fractional-N Digital PLL with a 1/8 DTC-Range-Reduction Technique Using a Quadruple-Timing-Margin Phase Selector. ISSCC 2022: 378-380

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