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"180.5Mbps-8Gbps DLL-based clock and data recovery circuit with low jitter ..."

Yuequan Liu et al. (2015)

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DOI: 10.1109/ISCAS.2015.7168903

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-02

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Yuequan Liu, Yuan Wang, Song Jia, Xing Zhang:
180.5Mbps-8Gbps DLL-based clock and data recovery circuit with low jitter performance. ISCAS 2015: 1394-1397

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