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"Design of TETRA 2 turbo decoder with minimum memory hardware interleaver."

Ji-Hoon Kim (2012)

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DOI: 10.1109/ISCAS.2012.6271610

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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Ji-Hoon Kim:
Design of TETRA 2 turbo decoder with minimum memory hardware interleaver. ISCAS 2012: 1779-1782

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