Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"Hardware efficient recursive VLSI architecture for multilevel lifting 2-D DWT."

Anand D. Darji et al. (2012)

> Home

Details and statistics

DOI: 10.1109/ISCAS.2012.6271399

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/iscas/DarjiTMC12
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/iscas/DarjiTMC12
Anand D. Darji, Nisarg Trivedi, S. N. Merchant, Arun N. Chandorkar:
Hardware efficient recursive VLSI architecture for multilevel lifting 2-D DWT. ISCAS 2012: 1014-1017

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.