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"A chip-to-chip clock-deskewing circuit for 3-D ICs."

Ai-Jia Chuang, Yu Lee, Ching-Yuan Yang (2012)

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DOI: 10.1109/ISCAS.2012.6271574

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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  dblp key:
  - conf/iscas/ChuangLY12
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  - https://dblp.org/rec/conf/iscas/ChuangLY12
Ai-Jia Chuang, Yu Lee, Ching-Yuan Yang:
A chip-to-chip clock-deskewing circuit for 3-D ICs. ISCAS 2012: 1652-1655

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