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"A dual-pulse-clock double edge triggered flip-flop for low voltage and ..."

Kuo-Hsing Cheng, Yung-Hsiang Lin (2003)

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DOI: 10.1109/ISCAS.2003.1206304

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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Kuo-Hsing Cheng, Yung-Hsiang Lin:
A dual-pulse-clock double edge triggered flip-flop for low voltage and high speed application. ISCAS (5) 2003: 425-428

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