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"Automatic circuit design and modelling for heterogeneous FPGAs."

Sadegh Yazdanshenas, Vaughn Betz (2017)

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DOI: 10.1109/FPT.2017.8280115

access: closed

type: Conference or Workshop Paper

metadata version: 2020-02-17

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  dblp key:
  - conf/fpt/YazdanshenasB17
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  - https://dblp.org/rec/conf/fpt/YazdanshenasB17
Sadegh Yazdanshenas, Vaughn Betz:
Automatic circuit design and modelling for heterogeneous FPGAs. FPT 2017: 9-16

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