"A Sub-200 fs RMS jitter capacitor multiplier loop filter-based PLL in 28 ..."

Burak Çatli et al. (2013)

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DOI: 10.1109/CICC.2013.6658471

access: closed

type: Conference or Workshop Paper

metadata version: 2021-04-01

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Burak Çatli, Ali Nazemi, Tamer A. Ali, Siavash Fallahi, Yang Liu, Jaehyup Kim, Mohammed M. Abdul-Latif, Mahmoud Reza Ahmadi, Hassan Maarefi, Afshin Momtaz, Namik Kocaman:
A Sub-200 fs RMS jitter capacitor multiplier loop filter-based PLL in 28 nm CMOS for high-speed serial communication applications. CICC 2013: 1-4

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