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"Geyser-2: The second prototype CPU with fine-grained run-time power gating."

Lei Zhao et al. (2011)

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DOI: 10.1109/ASPDAC.2011.5722310

access: closed

type: Conference or Workshop Paper

metadata version: 2024-03-21

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  dblp key:
  - conf/aspdac/ZhaoISKSKAKHUMUKNTNK11
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  persistent URL:
  - https://dblp.org/rec/conf/aspdac/ZhaoISKSKAKHUMUKNTNK11
Lei Zhao, Daisuke Ikebuchi, Yoshiki Saito, M. Kamata, Naomi Seki, Yu Kojima, Hideharu Amano, Satoshi Koyama, Tatsunori Hashida, Y. Umahashi, D. Masuda, Kimiyoshi Usami, Keiji Kimura, Mitaro Namiki, Seidai Takeda, Hiroshi Nakamura, Masaaki Kondo:
Geyser-2: The second prototype CPU with fine-grained run-time power gating. ASP-DAC 2011: 87-88

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