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"Design of gate-leakage-based timer using an amplifier-less replica-bias ..."

Atsuki Kobayashi et al. (2019)

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DOI: 10.1145/3287624.3287756

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-21

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  - conf/aspdac/KobayashiNHAN19
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Atsuki Kobayashi, Yuya Nishio, Kenya Hayashi, Shigeki Arata, Kiichi Niitsu:
Design of gate-leakage-based timer using an amplifier-less replica-bias switching technique in 55-nm DDC CMOS. ASP-DAC 2019: 9-10

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