"A high performance VLSI architecture for integer motion estimation in HEVC."

Yuan Xu et al. (2013)

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DOI: 10.1109/ASICON.2013.6811845

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-25

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Yuan Xu, Jinsong Liu, Liwei Gong, Zhi Zhang, Robert K. F. Teng:
A high performance VLSI architecture for integer motion estimation in HEVC. ASICON 2013: 1-4

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