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"A Low Complexity and a Low Latency Bit Parallel Systolic Multiplier over ..."

Soonhak Kwon (2003)

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DOI: 10.1109/ARITH.2003.1207679

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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Soonhak Kwon:
A Low Complexity and a Low Latency Bit Parallel Systolic Multiplier over GF(2m) Using an Optimal Normal Basis of Type II. IEEE Symposium on Computer Arithmetic 2003: 196-

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