BibTeX record conf/vlsic/LuLNT15

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@inproceedings{DBLP:conf/vlsic/LuLNT15,
  author       = {C. Lu and
                  C. H. Lee and
                  T. Nishimura and
                  A. Toriumi},
  title        = {Design and demonstration of reliability-aware Ge gate stacks with
                  0.5 nm {EOT}},
  booktitle    = {Symposium on {VLSI} Circuits, {VLSIC} 2015, Kyoto, Japan, June 17-19,
                  2015},
  pages        = {18},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/VLSIC.2015.7231383},
  doi          = {10.1109/VLSIC.2015.7231383},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsic/LuLNT15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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