BibTeX record conf/isscc/SohnSSYKBKLJBJK08

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@inproceedings{DBLP:conf/isscc/SohnSSYKBKLJBJK08,
  author       = {Kyomin Sohn and
                  Young{-}Ho Suh and
                  Young{-}Jae Son and
                  Daesik Yim and
                  Kang{-}Young Kim and
                  Dae{-}Gi Bae and
                  Ted Kang and
                  Hoon Lim and
                  Soon{-}Moon Jung and
                  Hyun{-}Geun Byun and
                  Young{-}Hyun Jun and
                  Kinam Kim},
  title        = {A 100nm Double-Stacked 500MHz 72Mb Separate-I/O Synchronous {SRAM}
                  with Automatic Cell-Bias Scheme and Adaptive Block Redundancy},
  booktitle    = {2008 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2008, Digest of Technical Papers, San Francisco, CA, USA, February
                  3-7, 2008},
  pages        = {386--387},
  publisher    = {{IEEE}},
  year         = {2008},
  url          = {https://doi.org/10.1109/ISSCC.2008.4523219},
  doi          = {10.1109/ISSCC.2008.4523219},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/SohnSSYKBKLJBJK08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}