BibTeX record conf/apccas/PyunKC16

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@inproceedings{DBLP:conf/apccas/PyunKC16,
  author       = {Ki{-}Hyun Pyun and
                  Dae Hyun Kwon and
                  Woo{-}Young Choi},
  title        = {A 3.5/7.0/14-Gb/s multi-rate clock and data recovery circuit with
                  a multi-mode rotational binary phase detector},
  booktitle    = {2016 {IEEE} Asia Pacific Conference on Circuits and Systems, {APCCAS}
                  2016, Jeju, South Korea, October 25-28, 2016},
  pages        = {327--329},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/APCCAS.2016.7803966},
  doi          = {10.1109/APCCAS.2016.7803966},
  timestamp    = {Wed, 16 Oct 2019 14:14:50 +0200},
  biburl       = {https://dblp.org/rec/conf/apccas/PyunKC16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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