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ORCIDDeepak Mathaikutty
- > Home > Persons > Deepak Mathaikutty
Publications
- 2009
[b2]Deepak Mathaikutty, Sandeep Kumar Shukla:
Metamodeling-Driven IP Reuse for SoC Integration and Microprocessor Design. Artech House 2009, ISBN 978-1-59693-424-5, pp. I-XXI, 1-287- [j11]Alberto L. Sangiovanni-Vincentelli
, Sandeep K. Shukla, Janos Sztipanovits, Guang Yang, Deepak Mathaikutty:
Metamodeling: An Emerging Representation Paradigm for System-Level Design. IEEE Des. Test Comput. 26(3): 54-69 (2009) - [j10]Sumit Ahuja, Deepak Mathaikutty, Avinash Lakshminarayana, Sandeep K. Shukla:
SCoPE: Statistical Regression Based Power Models for Co-Processors Power Estimation. J. Low Power Electron. 5(4): 407-415 (2009) - [c26]Sumit Ahuja, Deepak Mathaikutty, Gaurav Singh, Joe Stetzer, Sandeep K. Shukla, Ajit Dingankar:
Power estimation methodology for a high-level synthesis framework. ISQED 2009: 541-546 - [c25]Sumit Ahuja, Deepak Mathaikutty, Avinash Lakshminarayana, Sandeep K. Shukla:
Accurate power estimation of hardware co-processors using system level simulation. SoCC 2009: 399-402 - 2008
- [j9]Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla, Axel Jantsch:
SML-Sys: a functional framework with multiple models of computation for modeling heterogeneous system. Des. Autom. Embed. Syst. 12(1-2): 1-30 (2008) - [j8]Deepak Mathaikutty, Sandeep K. Shukla:
Mining metadata for composability of IPs from SystemC IP library. Des. Autom. Embed. Syst. 12(1-2): 63-94 (2008) - [j7]Deepak Mathaikutty, Sreekumar V. Kodakara, Ajit Dingankar, Sandeep K. Shukla, David J. Lilja:
MMV: A Metamodeling Based Microprocessor Validation Environment. IEEE Trans. Very Large Scale Integr. Syst. 16(4): 339-352 (2008) - [j6]Deepak Mathaikutty, Sandeep K. Shukla:
MCF: A Metamodeling-Based Component Composition Framework - Composing SystemC IPs for Executable System Models. IEEE Trans. Very Large Scale Integr. Syst. 16(7): 792-805 (2008) - [j5]Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla:
A Trace-Based Framework for Verifiable GALS Composition of IPs. IEEE Trans. Very Large Scale Integr. Syst. 16(9): 1176-1186 (2008) - [c24]Syed Suhaib, Bijoy Antony Jose, Sandeep K. Shukla, Deepak Mathaikutty:
Formal Transformation of a KPN Specification to a GALS Implementation. FDL 2008: 84-89 - [c23]Sumit Ahuja, Deepak Mathaikutty, Sandeep K. Shukla:
Applying Verification Collaterals for Accurate Power Estimation. MTV 2008: 61-66 - 2007
- [j4]Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla, Axel Jantsch:
EWD: A metamodeling driven customizable multi-MoC system modeling framework. ACM Trans. Design Autom. Electr. Syst. 12(3): 33:1-33:43 (2007) - [c22]Deepak Mathaikutty, Sandeep K. Shukla, Sreekumar V. Kodakara, David J. Lilja, Ajit Dingankar:
Design fault directed test generation for microprocessor validation. DATE 2007: 761-766 - [c21]Deepak Mathaikutty, Ajit Dingankar, Sandeep K. Shukla:
A Metamodeling based Framework for Architectural Modeling and Simulator Generation. FDL 2007: 210-218 - [c20]Deepak Mathaikutty, Sumit Ahuja, Ajit Dingankar, Sandeep K. Shukla:
Model-driven test generation for system level validation. HLDVT 2007: 83-90 - [c19]Deepak Mathaikutty, Sandeep K. Shukla:
Type Inference for IP Composition. MEMOCODE 2007: 61-70 - [c18]Sumit Ahuja, Deepak Mathaikutty, Sandeep K. Shukla, Ajit Dingankar:
Assertion-Based Modal Power Estimation. MTV 2007: 3-7 - [c17]Sreekumar V. Kodakara, Deepak Mathaikutty, Ajit Dingankar, Sandeep K. Shukla, David J. Lilja:
Model Based Test Generation for Microprocessor Architecture Validation. VLSI Design 2007: 465-472 - [c16]Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla:
Dataflow Architectures for GALS. FMGALS@MEMOCODE 2007: 33-50 - 2006
- [j3]Syed Suhaib, Deepak Mathaikutty, David Berner, Sandeep K. Shukla:
Validating Families of Latency Insensitive Protocols. IEEE Trans. Computers 55(11): 1391-1401 (2006) - [j2]Hiren D. Patel, Deepak Mathaikutty, David Berner, Sandeep K. Shukla:
CARH: service-oriented architecture for validating system-level designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(8): 1458-1474 (2006) - [c15]Deepak Mathaikutty, Sandeep K. Shukla:
Mining Metadata for Composability of IPs from SystemC IP Library. FDL 2006: 143-151 - [c14]Deepak Mathaikutty, Sandeep K. Shukla:
MCF: A Metamodeling-based Visual Component Composition Framework. FDL 2006: 367-375 - [c13]Ajit Dingankar, Deepak Mathaikutty, Sreekumar V. Kodakara, Sandeep K. Shukla, David J. Lilja:
MMV: Metamodeling Based Microprocessor Valiation Environment. HLDVT 2006: 143-148 - [c12]Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla, Jean-Pierre Talpin:
Polychronous Methodology For System Design: A True Concurrency Approach. HLDVT 2006: 211-214 - [c11]Deepak Mathaikutty, Sandeep K. Shukla:
SoC Design Space Exploration through Automated IP Selection from SystemC IP Library. SoCC 2006: 109-110 - [c10]Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla:
A Trace Based Framework for Validation of SoC Designs with GALS Systems. SoCC 2006: 247-250 - 2005
- [j1]Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla, David Berner:
XFM: An incremental methodology for developing formal models. ACM Trans. Design Autom. Electr. Syst. 10(4): 589-609 (2005) - [c9]Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla, Axel Jantsch:
Modelling Environment for Heterogeneous Systems based on MoCs. FDL 2005: 291-303 - [c8]David Berner, Jean-Pierre Talpin, Hiren D. Patel, Deepak Mathaikutty, Sandeep K. Shukla:
SystemCXML: An Exstensible SystemC Front end Using XML. FDL 2005: 405-409 - [c7]Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla, David Berner:
Validating families of latency insensitive protocols. HLDVT 2005: 127-134 - [c6]David Berner, Hiren D. Patel, Deepak Mathaikutty, Sandeep K. Shukla:
Automated Extraction of Structural Information from SystemC-based IP for Validation. MTV 2005: 99-104 - [c5]Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla:
System Level Design Methodology for System On Chips using Multi-Threaded Graphs. SoCC 2005: 133-136 - [c4]Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla, David Berner, Jean-Pierre Talpin:
A Functional Programming Framework for Latency Insensitive Protocol Validation. FMGALS@MEMOCODE 2005: 169-188 - 2004
- [c3]Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla:
A Functional Programming Framework of Heterogeneous Model of Computation for System Design. FDL 2004: 586-598 - [c2]Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla:
Effects of property ordering in an incremental formal modeling methodology. HLDVT 2004: 89-94 - [c1]Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla, David Berner:
Extreme Formal Modeling (XFM) for Hardware Models. MTV 2004: 30-35
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