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William R. Patterson
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2020 – today
- 2022
- [c15]Satyananda Kashyap, Hakan Bulu, Ashutosh Jadhav, Ronak Dholakia, Amon Y. Liu, Hussain Rangwala, William R. Patterson, Mehdi Moradi:
A new deep neural segmentation network for cerebral aneurysms in 2D digital subtraction angiography. Medical Imaging: Image-Guided Procedures 2022 - [i1]Ashutosh Jadhav, Satyananda Kashyap, Hakan Bulu, Ronak Dholakia, Amon Y. Liu, Tanveer F. Syeda-Mahmood, William R. Patterson, Hussain Rangwala, Mehdi Moradi:
Towards Automatic Prediction of Outcome in Treatment of Cerebral Aneurysms. CoRR abs/2211.11749 (2022)
2010 – 2019
- 2018
- [j6]Marco Donato, R. Iris Bahar, William R. Patterson, Alexander Zaslavsky:
A Sub-Threshold Noise Transient Simulator Based on Integrated Random Telegraph and Thermal Noise Modeling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(3): 643-656 (2018) - 2016
- [c14]Marco Donato, R. Iris Bahar, William R. Patterson, Alexander Zaslavsky:
A fast simulator for the analysis of sub-threshold thermal noise transients. DAC 2016: 56:1-56:6 - [c13]Xijing Han, Marco Donato, R. Iris Bahar, Alexander Zaslavsky, William R. Patterson:
Design of Error-Resilient Logic Gates with Reinforcement Using Implications. ACM Great Lakes Symposium on VLSI 2016: 191-196 - 2015
- [c12]Marco Donato, R. Iris Bahar, William R. Patterson, Alexander Zaslavsky:
A Simulation Framework for Analyzing Transient Effects Due to Thermal Noise in Sub-Threshold Circuits. ACM Great Lakes Symposium on VLSI 2015: 45-50 - 2013
- [j5]Ming Yin, David A. Borton, Juan Aceros, William R. Patterson, Arto V. Nurmikko:
A 100-Channel Hermetically Sealed Implantable Device for Chronic Wireless Neurosensing Applications. IEEE Trans. Biomed. Circuits Syst. 7(2): 115-128 (2013) - 2012
- [c11]Juan Aceros, Ming Yin, David A. Borton, William R. Patterson, Christopher W. Bull, Arto V. Nurmikko:
Polymeric packaging for fully implantable wireless neural microsensors. EMBC 2012: 743-746 - [c10]Marco Donato, Fabio Cremona, Warren Jin, R. Iris Bahar, William R. Patterson, Alexander Zaslavsky, Joseph L. Mundy:
A noise-immune sub-threshold circuit design based on selective use of Schmitt-trigger logic. ACM Great Lakes Symposium on VLSI 2012: 39-44 - [c9]Ming Yin, David A. Borton, Juan Aceros, William R. Patterson, Arto V. Nurmikko:
A 100-channel hermetically sealed implantable device for wireless neurosensing applications. ISCAS 2012: 2629-2632 - 2011
- [c8]Juan Aceros, Ming Yin, David A. Borton, William R. Patterson, Arto V. Nurmikko:
A 32-channel fully implantable wireless neurosensor for simultaneous recording from two cortical regions. EMBC 2011: 2300-2306 - [c7]David A. Borton, Ming Yin, Juan Aceros, Naubahar Agha, Juri Minxha, Jacob Komar, William R. Patterson, Christopher W. Bull, Arto V. Nurmikko:
Developing implantable neuroprosthetics: A new model in pig. EMBC 2011: 3024-3030 - 2010
- [j4]Arto V. Nurmikko, John P. Donoghue, Leigh R. Hochberg, William R. Patterson, Yoon-Kyu Song, Christopher W. Bull, David A. Borton, Farah Laiwalla, Sunmee Park, Ming Yin, Juan Aceros:
Listening to Brain Microcircuits for Interfacing With External World - Progress in Wireless Implantable Microelectronic Neuroengineering Devices. Proc. IEEE 98(3): 375-388 (2010) - [c6]Pooya Jannaty, Florian C. Sabou, R. Iris Bahar, Joseph L. Mundy, William R. Patterson, Alexander Zaslavsky:
Numerical queue solution of thermal noise-induced soft errors in subthreshold CMOS devices. ACM Great Lakes Symposium on VLSI 2010: 281-286
2000 – 2009
- 2007
- [j3]Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, William R. Patterson, Alexander Zaslavsky:
Designing Nanoscale Logic Circuits Based on Markov Random Fields. J. Electron. Test. 23(2-3): 255-266 (2007) - [c5]Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, William R. Patterson, Alexander Zaslavsky:
Interactive presentation: Techniques for designing noise-tolerant multi-level combinational circuits. DATE 2007: 576-581 - [c4]Hua Li, Joseph L. Mundy, William R. Patterson, Dimitrios Kazazis, Alexander Zaslavsky, R. Iris Bahar:
Thermally-induced soft errors in nanoscale CMOS circuits. NANOARCH 2007: 62-69 - 2006
- [j2]Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, William R. Patterson, Alexander Zaslavsky:
MRF Reinforcer: A Probabilistic Element for Space Redundancy in Nanoscale Circuits. IEEE Micro 26(5): 19-27 (2006) - [c3]Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, William R. Patterson, Alexander Zaslavsky:
Designing MRF based error correcting circuits for memory elements. DATE 2006: 792-793 - [c2]Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, William R. Patterson, Alexander Zaslavsky:
Optimizing noise-immune nanoscale circuits using principles of Markov random fields. ACM Great Lakes Symposium on VLSI 2006: 149-152 - 2005
- [c1]Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, William R. Patterson, Alexander Zaslavsky:
Designing logic circuits for probabilistic computation in the presence of noise. DAC 2005: 485-490 - 2004
- [j1]William R. Patterson, Yoon-Kyu Song, Christopher W. Bull, Ilker Ozden, Andrew P. Deangellis, Christopher Lay, J. Lucas McKay, Arto V. Nurmikko, John D. Donoghue, Barry W. Connors:
A microelectrode/microelectronic hybrid device for brain implantable neuroprosthesis applications. IEEE Trans. Biomed. Eng. 51(10): 1845-1853 (2004)
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