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Jianfei Wang 0003
Person information
- affiliation: Xi'an Jiaotong University, School of Microelectronics, China
Other persons with the same name
- Jianfei Wang — disambiguation page
- Jianfei Wang 0001 — Nanjing University of Aeronautics and Astronautics, College of Automation Engineering, China
- Jianfei Wang 0002 — Fudan University, Department of Electronic Engineering, Shanghai, China
- Jianfei Wang 0004 — Beihang University, School of Computer Science, State Key Laboratory of Virtual Reality and Systems, China
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2020 – today
- 2024
- [j9]Chen Yang
, Yaoyao Yang, Yishuo Meng, Kaibo Huo, Siwei Xiang, Jianfei Wang
, Li Geng
:
Flexible and Efficient Convolutional Acceleration on Unified Hardware Using the Two-Stage Splitting Method and Layer-Adaptive Allocation of 1-D/2-D Winograd Units. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(3): 919-932 (2024) - [j8]Jianfei Wang
, Chen Yang
, Fahong Zhang, Yishuo Meng, Siwei Xiang, Yang Su
:
A High-Throughput Toom-Cook-4 Polynomial Multiplier for Lattice-Based Cryptography Using a Novel Winograd-Schoolbook Algorithm. IEEE Trans. Circuits Syst. I Regul. Pap. 71(1): 359-372 (2024) - [j7]Jianfei Wang
, Chen Yang
, Fahong Zhang, Jia Hou, Yishuo Meng, Siwei Xiang, Yang Su
:
A High-Throughput and Scalable Schoolbook Polynomial Multiplier for Accelerating Saber on FPGA Using a Novel Winograd-Based Architecture. IEEE Trans. Circuits Syst. II Express Briefs 71(4): 2344-2348 (2024) - [j6]Yishuo Meng, Siwei Xiang, Jianfei Wang
, Jia Hou, Chen Yang
:
ALSCA: A Large-Scale Sparse CNN Accelerator Using Position-First Dataflow and Input Channel Merging Approach. IEEE Trans. Circuits Syst. II Express Briefs 71(7): 3473-3477 (2024) - [j5]Fahong Zhang, Chen Yang
, Rui Zong
, Xinran Zheng, Jianfei Wang
, Yishuo Meng:
An Efficient and Scalable FHE-Based PDQ Scheme: Utilizing FFT to Design a Low Multiplication Depth Large-Integer Comparison Algorithm. IEEE Trans. Inf. Forensics Secur. 19: 2258-2272 (2024) - [j4]Chen Yang
, Yishuo Meng, Jiawei Xi, Siwei Xiang, Jianfei Wang
, Kuizhi Mei:
WRA-SS: A High-Performance Accelerator Integrating Winograd With Structured Sparsity for Convolutional Neural Networks. IEEE Trans. Very Large Scale Integr. Syst. 32(1): 164-177 (2024) - 2023
- [j3]Jia Hou, Jingyu Zhang, Qi Chen, Siwei Xiang, Yishuo Meng, Jianfei Wang, Cimang Lu, Chen Yang
:
POSS-CNN: An Automatically Generated Convolutional Neural Network with Precision and Operation Separable Structure Aiming at Target Recognition and Detection. Inf. 14(11): 604 (2023) - [j2]Jianfei Wang
, Chen Yang
, Fahong Zhang, Yishuo Meng, Yang Su
:
TCPM: A Reconfigurable and Efficient Toom-Cook-Based Polynomial Multiplier Over Rings Using a Novel Compressed Postprocessing Algorithm. IEEE Trans. Very Large Scale Integr. Syst. 31(8): 1153-1166 (2023) - [j1]Yishuo Meng, Chen Yang
, Siwei Xiang, Jianfei Wang
, Kuizhi Mei, Li Geng
:
An Efficient CNN Accelerator Achieving High PE Utilization Using a Dense-/Sparse-Aware Redundancy Reduction Method and Data-Index Decoupling Workflow. IEEE Trans. Very Large Scale Integr. Syst. 31(10): 1537-1550 (2023) - [c1]Yuheng Xia, Yishuo Meng, Siwei Xiang, Jianfei Wang, Chen Yang:
An Efficient Hardware Implementation of Dilated Convolution Using a Novel Channel-Equivalent Decomposition Method. ICTA 2023: 172-173
Coauthor Index
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last updated on 2024-09-10 02:09 CEST by the dblp team
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