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ORCIDTimothy M. Hollis
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Journal Articles
- 2022
[j5]Timothy M. Hollis
, Ronny Schneider, Martin Brox, Thomas Hein, Wolfgang Spirkl, Martin Bach, Mani Balakrishnan, Stefan Dietrich, Fabien Funfrock, Milena Ivanov, Natalija Jovanovic, Maksim Kuzmenka, Daniel Lauber, Juan Ocon Garrido, David Ovard, Karl Pfefferl, Sven Piatkowski, Gabriele Piscopo, Manfred Plan, Jens Polney, Jan Pottgiesser, Stephan Rau, Filippo Vitale, Marc Walter, Marcos Alvarez Gonzalez, Cristian Chetreanu, Andrea Sorrentino, Jörg Weller, Peter Mayer, Michael Richter, Casto Salobrena Garcia, Andreas Schneider, Shih Nern Wong:
An 8-Gb GDDR6X DRAM Achieving 22 Gb/s/pin With Single-Ended PAM-4 Signaling. IEEE J. Solid State Circuits 57(1): 224-235 (2022)- 2009
- [j4]Timothy M. Hollis:
Data Bus Inversion in High-Speed Memory Applications. IEEE Trans. Circuits Syst. II Express Briefs 56-II(4): 300-304 (2009) - 2008
- [j3]Timothy M. Hollis:
Jittery Signal Generation for High-Speed Interconnect Simulation. IEEE Trans. Circuits Syst. II Express Briefs 55-II(10): 1046-1050 (2008) - 2006
- [j2]Timothy M. Hollis, David J. Comer, Donald T. Comer:
Mitigating ISI Through Self-Calibrating Continuous-Time Equalization. IEEE Trans. Circuits Syst. I Regul. Pap. 53-I(10): 2234-2245 (2006) - 2005
- [j1]Timothy M. Hollis, David J. Comer, Donald T. Comer:
Optimization of MOS amplifier performance through channel length and inversion level selection. IEEE Trans. Circuits Syst. II Express Briefs 52-II(9): 545-549 (2005)
Conference and Workshop Papers
- 2021
- [c1]Timothy M. Hollis, Ronny Schneider, Martin Brox, Thomas Hein, Wolfgang Spirkl, Martin Bach, Mani Balakrishnan, Stefan Dietrich, Fabien Funfrock, Milena Ivanov, Natalija Jovanovic, Maksim Kuzmenka, Daniel Lauber, Juan Ocon Garrido, David Ovard, Karl Pfefferl, Sven Piatkowski, Gabriele Piscopo, Manfred Plan, Jens Polney, Jan Pottgiesser, Stephan Rau, Filippo Vitale, Marc Walter, Marcos Alvarez Gonzalez, Martin Broschwitz, Cristian Chetreanu, Andrea Sorrentino, Jörg Weller, Peter Mayer, Michael Richter, Casto Salobrena Garcia, Andreas Schneider, Shih Nern Wong:
25.3 An 8Gb GDDR6X DRAM Achieving 22Gb/s/pin with Single-Ended PAM4 Signaling. ISSCC 2021: 348-350
Coauthor Index
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