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Journal Articles
- 2016
[j2]Kosta Luria, Joseph Shor, Michael Zelikson, Alex Lyakhov:
Dual-Mode Low-Drop-Out Regulator/Power Gate With Linear and On-Off Conduction for Microprocessor Core On-Die Supply Voltages in 14 nm. IEEE J. Solid State Circuits 51(3): 752-762 (2016)- 2012
- [j1]Marcelo Yuffe, Moty Mehalel, Ernest Knoll, Joseph Shor, Tsvika Kurts, Eran Altshuler, Eyal Fayneh, Kosta Luria, Michael Zelikson:
A Fully Integrated Multi-CPU, Processor Graphics, and Memory Controller 32-nm Processor. IEEE J. Solid State Circuits 47(1): 194-205 (2012)
Conference and Workshop Papers
- 2023
- [c9]Michael Zelikson, Kosta Luria, Lior Gil, Yuval Brown, Vadim Goldenbeg, Dor Kasif, Elias Hlees, Alex Vinichuk:
A Digital Low-Dropout (LDO) Linear Regulator with Adaptive Transfer Function Featuring 125A/mm2 Power Density and Autonomous Bypass Mode. ISSCC 2023: 230-231 - [c8]Nicolas Butzen, Harish Krishnamurthy, Zakir Ahmed, Sheldon Weng, Krishnan Ravichandran, Michael Zelikson, James W. Tschanz, Jonathan Douglas:
A Monolithic 26A/mm2Imax, 88.5% Peak-Efficiency Continuously Scalable Conversion-Ratio Switched-Capacitor DC-DC Converter. ISSCC 2023: 232-233 - 2016
- [c7]Eyal Fayneh, Marcelo Yuffe, Ernest Knoll, Michael Zelikson, Muhammad Abozaed, Yair Talker, Ziv Shmuely, Saher Abu Rahme:
4.1 14nm 6th-generation Core processor SoC with low power consumption and improved performance. ISSCC 2016: 72-73 - 2015
- [c6]Kosta Luria, Joseph Shor, Michael Zelikson, Alex Lyakhov:
8.7 Dual-use low-drop-out regulator/power gate with linear and on-off conduction modes for microprocessor on-die supply voltages in 14nm. ISSCC 2015: 1-3 - 2010
- [c5]Gregory Sizikov, Avinoam Kolodny, Eby G. Friedman, Michael Zelikson:
Efficiency optimization of integrated DC-DC buck converters. ICECS 2010: 1208-1211 - 2004
- [c4]Yuri Bruck, Michael Zelikson:
Two novel cross-cascode differential amplifiers. ICECS 2004: 13-16 - 2003
- [c3]David Goren, Michael Zelikson, Rachel Gordin, Israel A. Wagner, Anastasia Barger, Alon Amir, Betty Livshitz, Anatoly Sherman, Youri Tretiakov, Robert A. Groves, J. Park, Donald L. Jordan, Sue E. Strang, Raminderpal Singh, Carl E. Dickey, David L. Harame:
On-chip interconnect-aware design and modeling methodology, based on high bandwidth transmission line devices. DAC 2003: 724-727 - 2002
- [c2]David Goren, Michael Zelikson, Tiberiu C. Galambos, Rachel Gordin, Betty Livshitz, Alon Amir, Anatoly Sherman, Israel A. Wagner:
An Interconnect-Aware Methodology for Analog and Mixed Signal Design, Based on High Bandwidth (Over 40 Ghz) On-Chip Transmission Line Approach . DATE 2002: 804-811 - 2000
- [c1]Yuri Bruck, Michael Zelikson, Gennady Burdo:
Novel design technique for highly linear current mode amplifiers. Analysis, design, simulations. ISCAS 2000: 695-698
Coauthor Index
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