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ORCIDYuichi Saitoh
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Journal Articles
- 1993
[j4]Yuichi Saitoh, Hideki Imai:
Some Codes for Correcting and Detecting Unidirectional Byte Errors. IEEE Trans. Computers 42(5): 547-552 (1993)- [j3]Yuichi Saitoh, Hideki Imai:
Generalized concatenated codes for channels where unidirectional byte errors are predominant. IEEE Trans. Inf. Theory 39(3): 1014-1022 (1993) - 1991
- [j2]Yuichi Saitoh, Hideki Imai:
Multiple unidirectional byte error-correcting codes. IEEE Trans. Inf. Theory 37(3): 903-908 (1991) - 1990
- [j1]Yuichi Saitoh, Kazuhiko Yamaguchi, Hideki Imai:
Some new binary codes correcting asymmetric/unidirectional errors. IEEE Trans. Inf. Theory 36(3): 645-647 (1990)
Conference and Workshop Papers
- 2006
- [c8]Shigeo Kawata
, Takayuki Teramoto, Hideaki Sugiura, Yuichi Saitoh, Yoshikazu Hayase:
Mathematical Modeling Support in a Distributed Problem Solving Environment for Scientific Computing. e-Science 2006: 98 - [c7]Hideaki Fuju, Shigeo Kawata, Hideaki Sugiura, Yuichi Saitoh, Yoshikazu Hayase, Hitohide Usami, Motohiro Yamada, Yutaka Miyahara, Hiroyuki Kanazawa, Takashi Kikuchi:
Scientific Simulation Execution Support on a Closed Distributed Computer Environment. e-Science 2006: 109 - 2005
- [c6]Shigeo Kawata, Hideaki Fuju, Hideaki Sugiura, Yuichi Saitoh, Yoshikazu Hayase, Takayuki Teramoto, Takashi Kikuchi:
A Distributed Problem Solving Environment (PSE) for Scientific Computing. e-Science 2005: 470-477 - 1994
- [c5]Masahito Matsuo, Hiroyuki Kondo, Yukari Takata, Souichi Kobayashi, Mitsugu Satoh, Toyohiko Yoshida, Yuichi Saitoh, Jun-ichi Hinata:
A 32-bit Superscalar Microprocessor with 64-Bit Processing and High Bandwidth DRAM Interface. ICCD 1994: 203-210 - 1993
- [c4]Yuichi Saitoh, Ikuyo Ibe, Hideki Imai:
Peak-Shift and Bit Error-Correction with Channel Side Information in Runlength-Limited Sequences. AAECC 1993: 304-315 - 1991
- [c3]Yuichi Saitoh, Hideki Imai:
Random and Byte Error Correcting Codes for Asymmetric or Undirectional Error Control. AAECC 1991: 403-413 - 1990
- [c2]Yuichi Saitoh, Hideki Imai:
Constructions of Codes Correcting Burst Asymmetric Errors. AAECC 1990: 59-70 - 1988
- [c1]Tom Shimizu, Toyohiko Yoshida, Yuichi Saitoh, Masahito Matsuo, Tatsuya Enomoto:
A 32-bit Microprocessor Based on the TRON Architecture: Design of the GMICRO/100. COMPCON 1988: 30-35
Coauthor Index
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