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Christopher Bailey 0002
Person information
- affiliation: University of York, UK
Other persons with the same name
- Christopher Bailey — disambiguation page
- Christopher Bailey 0001 — University of Bristol, Institute for Learning and Research Technology, UK (and 1 more)
- Christopher Bailey 0003 (aka: Christopher Michael Bailey) — University of Kent, UK
- Christopher Bailey 0004 — AbilityNet, London, UK (and 1 more)
- Christopher Bailey 0005 — World Health Organization, Geneva, Switzerland
- Chris Bailey — disambiguation page
- Chris Bailey 0001 — University of Greenwich, London, UK
- Chris Bailey 0003 — Sheffield Hallam University, Department of Education, Childhood, and Inclusion, UK
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Journal Articles
- 2019
- [j7]Christopher Crispin-Bailey, Chengliang Dai, Jim Austin:
A 65-nm CMOS Lossless Bio-Signal Compression Circuit With 250 FemtoJoule Performance Per Bit. IEEE Trans. Biomed. Circuits Syst. 13(5): 1087-1100 (2019) - [j6]Christopher Crispin-Bailey, Jim Austin, Bettina Platt, Anthony Moulds, Barry Crouch:
Miniature Untethered EEG Recorder Improves Advanced Neuroscience Methodologies. IEEE Trans. Biomed. Circuits Syst. 13(5): 1101-1111 (2019) - 2018
- [j5]Amir Mansoor Kamali Sarvestani, Chris Bailey, Jim Austin:
Performance Analysis of a 3D Wireless Massively Parallel Computer. J. Sens. Actuator Networks 7(2): 18 (2018) - 2015
- [j4]Amir Mansoor Kamali, Christopher Bailey, Jim Austin:
Evaluating 3D wireless grids as parallel platforms. Int. J. Ad Hoc Ubiquitous Comput. 19(3/4): 279-289 (2015) - 2014
- [j3]Christopher Bailey, Brendan Mullane:
Investigation of a Superscalar Operand Stack Using FO4 and ASIC Wire-Delay Metrics. VLSI Design 2014: 493189:1-493189:13 (2014) - 2008
- [j2]Hongying Meng, Michael Freeman, Nick E. Pears, Chris Bailey:
Real-time human action recognition on an embedded, reconfigurable video processing architecture. J. Real Time Image Process. 3(3): 163-176 (2008) - 1994
- [j1]Christopher Bailey, Reza Sotudeh:
HLL enhancement for stack based processors. Microprocess. Microprogramming 40(10-12): 685-688 (1994)
Conference and Workshop Papers
- 2022
- [c22]Pakon Thuphairo, Christopher Bailey, Anthony Moulds, Jim Austin:
Investigating Novel 3D Modular Schemes for Large Array Topologies: Power Modeling and Prototype Feasibility. DSD 2022: 268-275 - 2015
- [c21]Chengliang Dai, Christopher Bailey:
A lossless data reduction technique for wireless EEG recorders and its use in selective data filtering for seizure monitoring. EMBC 2015: 6186-6189 - 2009
- [c20]Michael Freeman, Chris Bailey:
Re-evaluation of the role of the processor within embedded multiprocessor systems. IADIS AC (1) 2009: 181-188 - [c19]Chris Bailey, Michael J. Freeman:
A JAVA bread-board simulator digital circuit simulation with an extensible e-learning tool. IADIS AC (1) 2009: 299-306 - 2007
- [c18]Hongying Meng, Nick E. Pears, Chris Bailey:
A Human Action Recognition System for Embedded Computer Vision Application. CVPR 2007 - [c17]Hongying Meng, Nick E. Pears, Chris Bailey:
Motion information combination for fast human action recognition. VISAPP (2) 2007: 21-28 - [c16]Nick E. Pears, Paul Wright, Chris Bailey:
Practical single view metrology for cuboids. VISAPP (2) 2007: 85-90 - [c15]Hongying Meng, Nick E. Pears, Chris Bailey:
Motion Feature Combination for Human Action Recognition in Video. VISIGRAPP (Selected Papers) 2007: 151-163 - 2006
- [c14]Hongying Meng, Nick E. Pears, Chris Bailey:
Human Action Classification Using SVM_2K Classifier on Motion Features. MRCS 2006: 458-465 - 2005
- [c13]Chris Bailey, Huibin Shi:
Instruction level parallelism of stack-code under varied issue widths, and one-level branch prediction. IADIS AC 2005: 23-30 - [c12]Michael Freeman, Chris Bailey:
Developing ubiquitous computing applications. IADIS AC 2005: 263-270 - [c11]Huibin Shi, Chris Bailey, Glenn Farrall, Neil Hastie, Sam Jenkins:
Combined simulator statistics and block code sampling to study performance enhancement of microarchitecture. SoCC 2005: 33-36 - 2004
- [c10]Huibin Shi, Chris Bailey:
Investigating Available Instruction Level Parallelism for Stack Based Machine Architectures. DSD 2004: 112-120 - [c9]Chris Bailey:
A Proposed Mechanism for Super-Pipelined Instruction-Issue for ILP Stack Machines. DSD 2004: 121-129 - [c8]Soyeb Alli, Chris Bailey:
Compiler-Directed Dynamic Memory Disambiguation for Loop Structures. DSD 2004: 130-134 - [c7]Soyeb Alli, Chris Bailey:
A Mechanism for Implementing Precise Exceptions in Pipelined Processors. DSD 2004: 598-602 - 2002
- [c6]Hong Liu, Enmin Song, Reza Sotudeh, Christopher Bailey:
Congestion Sensitive Algorithm for Point-to-Multipoint Multicast Congestion Control in ATM Networks. CATA 2002: 417-420 - 2000
- [c5]Chris Bailey:
Achieving Minimal and Deterministic Interrupt Execution in Stack-Based Processor Architectures. EUROMICRO 2000: 1368- - [c4]Michael Weeks, Chris Bailey, Reza Sotudeh:
Continuous Discrete-Event Simulation of a Continuous-Media Server I/O Subsystem. EUROMICRO 2000: 2002-2009 - [c3]Martin Maierhofer, Christopher Bailey:
On ATM Cell Batching and Its Effects on Bus Arbitration in a Conventional Multimedia Server. EUROMICRO 2000: 2010- - 1999
- [c2]Martin Maierhofer, Christopher Bailey:
An Assessment of Shared Local Memory Buffering for Enhanced Multimedia Server Scalability. IMSA 1999: 131-135 - [c1]Martin Maierhofer, Christopher Bailey, Hadj Batatia, Reza Sotudeh:
An Investigation of Arbitration in Servers for Distributed Multimedia Applications. PDPTA 1999: 1564-1570
Coauthor Index
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