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Pierre-Yves Peneau

Pierre-Yves Péneau

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Books and Theses

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2018
[b1]
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  - electronic edition @ archives-ouvertes.fr (open access)
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  dblp key:
  - phd/hal/Peneau18
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Pierre-Yves Péneau:
Intégration de technologies de mémoires non volatiles émergentes dans la hiérarchie de caches pour améliorer l'efficacité énergétique. (Integration of emerging non volatile memory in the cache hierarchy for energy-efficiency improvement). University of Montpellier, France, 2018

Conference and Workshop Papers

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2021
[c6]
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  dblp key:
  - conf/asiaccs/ClaudepierrePHR21
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  - https://dblp.org/rec/conf/asiaccs/ClaudepierrePHR21
Ludovic Claudepierre, Pierre-Yves Péneau, Damien Hardy, Erven Rohou:
TRAITOR: A Low-Cost Evaluation Platform for Multifault Injection. ASSS@AsiaCCS 2021: 51-56
2020
[c5]
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  - conf/eurosp/PeneauCHR20
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Pierre-Yves Péneau, Ludovic Claudepierre, Damien Hardy, Erven Rohou:
NOP-Oriented Programming: Should we Care? EuroS&P Workshops 2020: 694-703
2018
[c4]
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  - conf/arcs/PeneauNBTSG18
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Pierre-Yves Péneau, David Novo, Florent Bruguier, Lionel Torres, Gilles Sassatelli, Abdoulaye Gamatié:
Improving the Performance of STT-MRAM LLC Through Enhanced Cache Replacement Policy. ARCS 2018: 168-180
2017
[c3]
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  - conf/date/SenniDCPTGBS17
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Sophiane Senni, Thibaud Delobelle, Odilia Coi, Pierre-Yves Peneau, Lionel Torres, Abdoulaye Gamatié, Pascal Benoit, Gilles Sassatelli:
Embedded systems to high performance computing using STT-MRAM. DATE 2017: 536-541
2016
[c2]
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  - conf/mcsoc/KaraouiPMWG16
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Mohamed Lamine Karaoui, Pierre-Yves Peneau, Quentin L. Meunier, Franck Wajsbürt, Alain Greiner:
Exploiting Large Memory Using 32-Bit Energy-Efficient Manycore Architectures. MCSoC 2016: 61-68
[c1]
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  - conf/patmos/PeneauBGRBSTS16
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Pierre-Yves Peneau, Rabab Bouziane, Abdoulaye Gamatié, Erven Rohou, Florent Bruguier, Gilles Sassatelli, Lionel Torres, Sophiane Senni:
Loop optimization in presence of STT-MRAM caches: A study of performance-energy tradeoffs. PATMOS 2016: 162-169

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