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ORCID31st ARCS 2018: Braunschweig, Germany
- Mladen Berekovic, Rainer Buchty, Heiko Hamann, Dirk Koch, Thilo Pionteck:
Architecture of Computing Systems - ARCS 2018 - 31st International Conference, Braunschweig, Germany, April 9-12, 2018, Proceedings. Lecture Notes in Computer Science 10793, Springer 2018, ISBN 978-3-319-77609-5
Embedded Systems
- Patrick Eitschberger, Simon Holmbacka, Jörg Keller:
Trade-Off Between Performance, Fault Tolerance and Energy Consumption in Duplication-Based Taskgraph Scheduling. 3-17 - Martin Schoeberl
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Lipsi: Probably the Smallest Processor in the World. 18-30 - Heiko Hamann:
Superlinear Scalability in Parallel Computing and Multi-robot Systems: Shared Resources, Collaboration, and Network Topology. 31-42
Multicore Systems
- Johannes Freitag, Sascha Uhrig:
Closed Loop Controller for Multicore Real-Time Systems. 45-56 - Maxime France-Pillois, Jérôme Martin, Frédéric Rousseau:
Optimization of the GNU OpenMP Synchronization Barrier in MPSoC. 57-69
Analysis and Optimization
- Achim Lösch, Alex Wiens, Marco Platzner:
Ampehre: An Open Source Measurement Framework for Heterogeneous Compute Nodes. 73-84 - Sebastian Rachuj, Christian Herglotz, Marc Reichenbach, André Kaup, Dietmar Fey:
A Hybrid Approach for Runtime Analysis Using a Cycle and Instruction Accurate Model. 85-96
On-chip and Off-chip Networks
- Caroline Concatto, Jose Antonio Pascual, Javier Navaridas, Joshua Lant, Andrew Attwood, Mikel Luján, John Goodacre:
A CAM-Free Exascalable HPC Router for Low-Energy Communications. 99-111 - Martin Frieb, Alexander Stegmeier, Jörg Mische, Theo Ungerer:
Lightweight Hardware Synchronization for Avoiding Buffer Overflows in Network-on-Chips. 112-126 - Cora Lisa Perner:
Network Optimization for Safety-Critical Systems Using Software-Defined Networks. 127-138 - Sven Rheindt, Andreas Schenk, Akshay Srivatsa, Thomas Wild, Andreas Herkersdorf:
CaCAO: Complex and Compositional Atomic Operations for NoC-Based Manycore Platforms. 139-152
Memory Models and Systems
- Rico Amslinger, Sebastian Weis, Christian Piatka, Florian Haas, Theo Ungerer:
Redundant Execution on Heterogeneous Multi-cores Utilizing Transactional Memory. 155-167 - Pierre-Yves Péneau, David Novo, Florent Bruguier, Lionel Torres, Gilles Sassatelli, Abdoulaye Gamatié:
Improving the Performance of STT-MRAM LLC Through Enhanced Cache Replacement Policy. 168-180 - T. Chad Effler, Adam P. Howard, Tong Zhou, Michael R. Jantz, Kshitij A. Doshi, Prasad A. Kulkarni:
On Automated Feedback-Driven Data Placement in Multi-tiered Memory. 181-194 - Maximilian Senftleben, Klaus Schneider:
Operational Characterization of Weak Memory Consistency Models. 195-208
Energy Efficient Systems
- Yasumasa Chidai, Kojiro Izuoka, Ryota Shioya, Masahiro Goshima, Hideki Ando:
A Tightly Coupled Heterogeneous Core with Highly Efficient Low-Power Mode. 211-224 - Solomon Abera, M. Balakrishnan, Anshul Kumar:
Performance-Energy Trade-off in CMPs with Per-Core DVFS. 225-238 - Giuseppe Massari, Federico Terraneo, Michele Zanella, Davide Zoni:
Towards Fine-Grained DVFS in Embedded Multi-core CPUs. 239-251
Partial Reconfiguration
- Joost Hoozemans, Jeroen van Straten, Zaid Al-Ars, Stephan Wong:
Evaluating Auto-adaptation Methods for Fine-Grained Adaptable Processors. 255-268 - Nicolae Bogdan Grigore, Charalampos Kritikakis, Dirk Koch:
HLS Enabled Partially Reconfigurable Module Implementation. 269-282 - Alexander Dörflinger, Mark Albers, Björn Fiethe, Harald Michalik:
Hardware Acceleration in Genode OS Using Dynamic Partial Reconfiguration. 283-293
Large Scale Computing
- Michael Bromberger, Markus Hoffmann, Robin Rehrmann:
Do Iterative Solvers Benefit from Approximate Computing? An Evaluation Study Considering Orthogonal Approximation Methods. 297-310 - Thorbjörn Posewsky, Daniel Ziener:
A Flexible FPGA-Based Inference Architecture for Pruned Deep Neural Networks. 311-323
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