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Girish Pahwa
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Journal Articles
- 2023
- [j7]Prabhat Kumar, Andrew Nonaka, Revathi Jambunathan, Girish Pahwa, Sayeef S. Salahuddin, Zhi Yao:
FerroX: A GPU-accelerated, 3D phase-field simulation framework for modeling ferroelectric devices. Comput. Phys. Commun. 290: 108757 (2023) - [j6]Shivendra Singh Parihar, Simon Thomann, Girish Pahwa, Yogesh Singh Chauhan, Hussam Amrouch:
Cryogenic In-Memory Computing for Quantum Processors Using Commercial 5-nm FinFETs. IEEE Open J. Circuits Syst. 4: 258-270 (2023) - [j5]Girish Pahwa, Ayushi Sharma, Ravi Goel, Garima Gill, Harshit Agarwal, Yogesh Singh Chauhan, Chenming Hu:
Robust Compact Model of High-Voltage MOSFET's Drift Region. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(1): 337-340 (2023) - [j4]Shivendra Singh Parihar, Victor M. van Santen, Simon Thomann, Girish Pahwa, Yogesh Singh Chauhan, Hussam Amrouch:
Cryogenic CMOS for Quantum Processing: 5-nm FinFET-Based SRAM Arrays at 10 K. IEEE Trans. Circuits Syst. I Regul. Pap. 70(8): 3089-3102 (2023) - 2021
- [j3]Guilherme Paim, Georgios Zervakis, Girish Pahwa, Yogesh Singh Chauhan, Eduardo Antonio Cesar da Costa, Sergio Bampi, Jörg Henkel, Hussam Amrouch:
On the Resiliency of NCFET Circuits Against Voltage Over-Scaling. IEEE Trans. Circuits Syst. I Regul. Pap. 68(4): 1481-1492 (2021) - 2020
- [j2]Hussam Amrouch, Girish Pahwa, Amol D. Gaidhane, Chetan K. Dabhi, Florian Klemme, Om Prakash, Yogesh Singh Chauhan:
Impact of Variability on Processor Performance in Negative Capacitance FinFET Technology. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(9): 3127-3137 (2020) - 2018
- [j1]Hussam Amrouch, Girish Pahwa, Amol D. Gaidhane, Jörg Henkel, Yogesh Singh Chauhan:
Negative Capacitance Transistor to Address the Fundamental Limitations in Technology Scaling: Processor Performance. IEEE Access 6: 52754-52765 (2018)
Conference and Workshop Papers
- 2024
- [c10]Shivendra Singh Parihar, Girish Pahwa, Yogesh Singh Chauhan, Hussam Amrouch:
Impact of Self-Heating in 5nm FinFETs at Cryogenic Temperatures for Reliable Quantum Computing: Device-Circuit Interaction. IRPS 2024: 1-7 - [c9]Benjamin Hien, Marcel Walter, Victor M. van Santen, Florian Klemme, Shivendra Singh Parihar, Girish Pahwa, Yogesh Singh Chauhan, Hussam Amrouch, Robert Wille:
Technology Mapping for Cryogenic CMOS Circuits. ISVLSI 2024: 272-277 - 2023
- [c8]Victor M. van Santen, Marcel Walter, Florian Klemme, Shivendra Singh Parihar, Girish Pahwa, Yogesh Singh Chauhan, Robert Wille, Hussam Amrouch:
Design Automation for Cryogenic CMOS Circuits. DAC 2023: 1-6 - [c7]Shivendra Singh Parihar, Simon Thomann, Girish Pahwa, Yogesh Singh Chauhan, Hussam Amrouch:
5nm FinFET Cryogenic SRAM Evaluation for Quantum Computing. DRC 2023: 1-2 - 2022
- [c6]Chetan K. Dabhi, Girish Pahwa, Sayeef S. Salahuddin, Chenming Hu:
Compact Model for Trap Assisted Tunneling based GIDL. DRC 2022: 1-2 - 2020
- [c5]Hussam Amrouch, Victor M. van Santen, Girish Pahwa, Yogesh Singh Chauhan, Jörg Henkel:
NCFET to Rescue Technology Scaling: Opportunities and Challenges. ASP-DAC 2020: 637-644 - [c4]Govind Bajpai, Aniket Gupta, Om Prakash, Girish Pahwa, Jörg Henkel, Yogesh Singh Chauhan, Hussam Amrouch:
Impact of Radiation on Negative Capacitance FinFET. IRPS 2020: 1-5 - 2019
- [c3]Martin Rapp, Sami Salamin, Hussam Amrouch, Girish Pahwa, Yogesh Singh Chauhan, Jörg Henkel:
Performance, Power and Cooling Trade-Offs with NCFET-based Many-Cores. DAC 2019: 41 - [c2]Sami Salamin, Martin Rapp, Hussam Amrouch, Girish Pahwa, Yogesh Singh Chauhan, Jörg Henkel:
NCFET-Aware Voltage Scaling. ISLPED 2019: 1-6 - 2016
- [c1]Girish Pahwa, Tapas Dutta, Amit Agarwal, Yogesh Singh Chauhan:
Designing energy efficient and hysteresis free negative capacitance FinFET with negative DIBL and 3.5X ION using compact modeling approach. ESSCIRC 2016: 49-54
Informal and Other Publications
- 2022
- [i1]Prabhat Kumar, Andrew Nonaka, Revathi Jambunathan, Girish Pahwa, Sayeef S. Salahuddin, Zhi Yao:
FerroX : A GPU-accelerated, 3D Phase-Field Simulation Framework for Modeling Ferroelectric Devices. CoRR abs/2210.15668 (2022)
Coauthor Index
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