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Young-chul Rams Cho

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2010 – 2019

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2017
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Narasinga Rao Miniskar, Raj Narayana Gadde, Young-chul Rams Cho, Sukjin Kim:
Fast cycle-accurate compile based simulator for reconfigurable processor. ISCAS 2017: 1-4
2016
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Narasinga Rao Miniskar, Rahul R. Patil, Raj Narayana Gadde, Young-chul Rams Cho, Sukjin Kim, Shi Hwa Lee:
Intra mode power saving methodology for CGRA-based reconfigurable processor architectures. ISCAS 2016: 714-717

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