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Vipul Kumar Singhal 0001

Vipul Singhal 0001

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affiliation: Kilby Labs, Texas Instruments, Bangalore, India

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Journal Articles

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2019
[j1]
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  dblp key:
  - journals/jssc/JavvajiSMCP19
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  - https://dblp.org/rec/journals/jssc/JavvajiSMCP19
Sundeep Javvaji, Vipul Singhal, Vinod Menezes, Rajat Chauhan, Shanthi Pavan:
Analysis and Design of a Multi-Step Bias-Flip Rectifier for Piezoelectric Energy Harvesting. IEEE J. Solid State Circuits 54(9): 2590-2600 (2019)

Conference and Workshop Papers

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2021
[c6]
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  - conf/vlsid/0001CMMMMC21
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Vipul Singhal, Rajat Chauhan, Vinod Menezes, R. R. Manikandan, Raveesh Magod, Mahesh Mehendale, Anantha P. Chandrakasan:
150nA IQ, Quad Input - Quad Output, Intelligent Integrated Power Management for IoT Applications. VLSID 2021: 169-174
2018
[c5]
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Sundeep Javvaji, Vipul Singhal, Vinod Menezes, Rajat Chauhan, Shanthi Pavan:
Multi-Step Bias-Flip Rectification for Piezoelectric Energy Harvesting. ESSCIRC 2018: 42-45
[c4]
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  - conf/vlsid/RSCMM18
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R. R. Manikandan, Vipul Kumar Singhal, Rajat Chauhan, Vinod Menezes, Mahesh Mehendale:
A 1.2 pJ/cycle KHz Timer Circuit for Heavily Duty-Cycled Systems. VLSID 2018: 171-176
[c3]
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  - conf/vlsid/Sankaranarayanan18
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Sowmya Sankaranarayanan, Kulkarni Chaitali Vinod, Aswanth Sreekumar, Tonse Laxminidhi, Vipul Singhal, Rajat Chauhan:
Single Inductor Dual Output Buck Converter for Low Power Applications and Its Stability Analysis. VLSID 2018: 347-352
2015
[c2]
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  - conf/isscc/SinghalMCM15
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Vipul Kumar Singhal, Vinod Menezes, Srinivasa Chakravarthy, Mahesh Mehendale:
8.3 A 10.5μA/MHz at 16MHz single-cycle non-volatile memory access microcontroller with full state retention at 108nA in a 90nm process. ISSCC 2015: 1-3
2013
[c1]
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  - conf/vdat/SinghalDMP13
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Vipul Singhal, Ayon Dey, Suresh Mallala, Somshubhra Paul:
A Methodology for Early and Accurate Analysis of Inrush and Latency Tradeoffs during Power-Domain Wakeup. VDAT 2013: 294-303

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