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Theodoros Simopoulos
Person information
- affiliation: University of Patras, Greece
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2020 – today
- 2021
- [j2]Theodoros Simopoulos
, George Ph. Alexiou, Lazaros Spyridopoulos, Nikos Konofaos
:
Simultaneous accessing of multiple SRAM subregions forming configurable and automatically generated memory fields. Int. J. Circuit Theory Appl. 49(7): 2238-2254 (2021) - 2020
- [c4]Konstantinos Velonis, Theodoros Simopoulos
, George Ph. Alexiou:
Application for automatic placement of hardware modules in layout form. ICM 2020: 1-4
2010 – 2019
- 2019
- [j1]Theodoros Simopoulos
, George Alexiou, Themistoklis Haniotakis:
Implementation Guidelines of WDSRAM and Comparison with Typical SRAM Using Nanoscale Hierarchical Implementation Model. J. Circuits Syst. Comput. 28(Supplement-1): 1940008:1-1940008:14 (2019) - 2018
- [c3]Theodoros Simopoulos
, Themistoklis Haniotakis, George Alexiou:
A 1Kx32 bit WDSRAM page with rapid write access. DTIS 2018: 1-2 - 2017
- [c2]Theodoros Simopoulos
, Lazaros Spyridopoulos, George Alexiou, Nikos Konofaos
:
Multi field SRAM access via intra-encoders and crossbar addressing scheme. MOCAST 2017: 1-4 - 2014
- [c1]Theodoros Simopoulos
, Themistoklis Haniotakis, George Alexiou:
Implementation of a Low Leakage Standard Cell Library based on materials from UMC 65nm technology. Panhellenic Conference on Informatics 2014: 36:1-36:2
Coauthor Index
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last updated on 2024-04-24 22:55 CEST by the dblp team
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