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Niraj Nandan
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2020 – today
- 2022
- [c15]Mayank Mangla, Mihir Mody, Kedar Chitnis, Piyali Goswami, Tarkesh Pande, Shashank Dabral, Shyam Jagannathan, Stefan Haas, Gang Hua, Hrushikesh Garud, Kumar Desappan, Prithvi Shankar, Niraj Nandan:
Efficient in-cabin monitoring solution using TI TDA2PxSOCs. Autonomous Vehicles and Machines 2022: 1-5 - 2021
- [c14]Mihir Mody, Rajasekhar Allu, Gang Hua, Brijesh Jadav, Niraj Nandan, Ankur, Mayank Mangla:
DRAM Bandwidth Optimal Perspective Transform Engine. Autonomous Vehicles and Machines 2021: 1-6 - 2020
- [c13]Rama Venkatasubramanian, Don Steiss, Greg Shurtz, Tim Anderson, Kai Chirca, Raghavendra Santhanagopal, Niraj Nandan, Anish Reghunath, Hetul Sanghvi, Daniel Wu, Abhijeet Chachad, Brian Karguth, Denis Beaudoin, Charles Fuoco, Lewis Nardini, Chunhua Hu, Sam Visalli, Amrit Mundra, Devanathan Varadarajan, Frank Cano, Shane Stelmach, Mihir Mody, Arthur Redfern, Haydar Bilhan, Maher Sarraj, Ali Siddiki, Anthony Lell, Eldad Falik, Anthony M. Hill, Abhinay Armstrong, Todd Beck, Vijay Kanumuri, Steven Mullinnix, Darnell Moore, Jason Jones, Manoj Koul, Sanjive Agarwala:
2.6 A 16nm 3.5B+ Transistor >14TOPS 2-to-10W Multicore SoC Platform for Automotive and Embedded Applications with Integrated Safety MCU, 512b Vector VLIW DSP, Embedded Vision and Imaging Acceleration. ISSCC 2020: 52-54
2010 – 2019
- 2017
- [c12]Mihir N. Mody, Hetul Sanghvi, Niraj Nandan, Shashank Dabral, Rajasekhar Allu, Rajat Sagar, Kedar Chitnis, Jason Jones, Brijesh Jadhav, Sujith Shivalingappa, Aish Dubey:
A 216 GOPS flexible WDR Image Processor for ADAS SoC. COOL Chips 2017: 1-2 - 2016
- [c11]Mihir N. Mody, Niraj Nandan, Hetul Sanghvi:
Efficient VLSI architecture for SAO decoding in 4K Ultra-HD HEVC video codec. SoCC 2016: 81-84 - 2015
- [c10]Mihir Mody, Niraj Nandan, Shashank Dabral, Hetul Sanghvi, Rajat Sagar, Zoran Nikolic, Kedar Chitnis, Rajasekhar Allu, Gang Hua:
Image signal processing for front camera based automated driver assistance system. ICCE-Berlin 2015: 158-159 - [c9]Dipan Kumar Mandal, Mihir Mody, Mahesh Mehendale, Naresh Yadav, Ghone Chaitanya, Piyali Goswami, Hetul Sanghvi, Niraj Nandan:
Accelerating H.264/HEVC video slice processing using application specific instruction set processor. ICCE 2015: 408-411 - [c8]Mihir N. Mody, Niraj Nandan, Hetul Sanghvi, Rajasekhar Allu, Rajat Sagar:
Flexible Wide Dynamic Range (WDR) processing support in image signal processor (ISP). ICCE 2015: 467-470 - 2014
- [c7]Mihir N. Mody, Hetul Sanghvi, Niraj Nandan, Shashank Dabral, Rajasekhar Allu, Dharmendra Soni, Sunil Sah, Gayathri Seshadri, Prashant Karandikar:
High performance and flexible imaging Sub-system. ICACCI 2014: 545-548 - [c6]Prashant Karandikar, Mihir N. Mody, Hetul Sanghvi, Vasant Easwaran, Prithvi Shankar, Rahul Gulati, Niraj Nandan, Subrangshu Das:
Efficient system level cache architecture for multimedia SoC. ICACCI 2014: 635-639 - [c5]Hetul Sanghvi, Mihir N. Mody, Niraj Nandan, Mahesh Mehendale, Subrangshu Das, Dipan Kumar Mandal, Nainala Vyagrheswarudu, Vijayavardhan Baireddy, Pavan Shastry:
A monolithic programmable Ultra-HD video codec engine. ICASSP 2014: 1399-1403 - [c4]Niraj Nandan:
High performance DMA controller for ultra HDTV video codecs. ICCE 2014: 65-66 - [c3]Hetul Sanghvi, Mihir N. Mody, Niraj Nandan, Mahesh Mehendale, Subrangshu Das, Dipan Kumar Mandal, Pavan Shastry:
A 28nm programmable and low power ultra-HD video codec engine. ISCAS 2014: 558-561 - [c2]Niraj Nandan, Mihir N. Mody, Hetul Sanghvi, Prithvi Shankar:
Customization of de-blocking filter edge order for high performance: Study of H.264 AVC/SVC, H.265. ISSPIT 2014: 213-217 - 2013
- [c1]Mihir Mody, Niraj Nandan, Hideo Tamama:
High throughput VLSI architecture supporting HEVC loop filter for Ultra HDTV. ICCE-Berlin 2013: 54-57
Coauthor Index
aka: Mihir Mody
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