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ORCIDXun Jian 0002
Person information
- affiliation: Virginia Tech, Blacksburg, VA, USA
- affiliation (former): University of Illinois at Urbana-Champaign, Champaign, IL, USA
Other persons with the same name
- Xun Jian 0001
![[0000-0001-5934-6493]](https://dblp1.uni-trier.de/img/orcid-mark.12x12.png "0000-0001-5934-6493")
— Hong Kong University of Science and Technology, Hong Kong, SAR, China - Xun Jian 0003 — Institute of Remote Sensing and Digital Earth, Chinese Academy of Sciences, Beijing, China
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2020 – today
- 2024
[c19]Xin Wang, Jagadish Kotra, Alex Jones, Wenjie Xiong, Xun Jian:
Counter-light Memory Encryption. ISCA 2024: 724-738- [c18]Gagandeep Panwar, Muhammad Laghari, Esha Choukse, Xun Jian:
DyLeCT: Achieving Huge-page-like Translation Performance for Hardware-compressed Memory. ISCA 2024: 1129-1143 - 2023
- [c17]Redwan Ibne Seraj Khan, Ahmad Hossein Yazdani, Yuqi Fu, Arnab K. Paul, Bo Ji, Xun Jian, Yue Cheng, Ali Raza Butt:
SHADE: Enable Fundamental Cacheability for Distributed Deep Learning Training. FAST 2023: 135-152 - 2022
- [c16]Xin Wang, Daulet Talapkaliyev, Matthew Hicks, Xun Jian:
Self-Reinforcing Memoization for Cryptography Calculations in Secure Memory Systems. MICRO 2022: 678-692 - [c15]Xin Wang, Jagadish B. Kotra, Xun Jian:
Eager Memory Cryptography in Caches. MICRO 2022: 693-709 - [c14]Gagandeep Panwar, Muhammad Laghari, David Bears, Yuqing Liu, Chandler Jearls, Esha Choukse, Kirk W. Cameron, Ali Raza Butt, Xun Jian:
Translation-optimized Memory Compression for Capacity. MICRO 2022: 992-1011 - 2021
- [c13]Da Zhang, Gagandeep Panwar, Jagadish B. Kotra, Nathan DeBardeleben, Sean Blanchard, Xun Jian:
Quantifying Server Memory Frequency Margin and Using It to Improve Performance in HPC Systems. ISCA 2021: 748-761 - 2020
- [c12]Harrison Williams, Xun Jian, Matthew Hicks:
Forget Failure: Exploiting SRAM Data Remanence for Low-overhead Intermittent Computation. ASPLOS 2020: 69-84
2010 – 2019
- 2019
- [j2]Kate Nguyen, Kehan Lyu, Xianze Meng, Vilas Sridharan, Xun Jian:
Nonblocking DRAM Refresh. IEEE Micro 39(3): 103-109 (2019) - [c11]Gagandeep Panwar, Da Zhang, Yihan Pang, Mai Dahshan, Nathan DeBardeleben, Binoy Ravindran, Xun Jian:
Quantifying Memory Underutilization in HPC Systems and Using it to Improve Performance via Architecture Support. MICRO 2019: 821-835 - 2018
- [c10]Kate Nguyen, Kehan Lyu, Xianze Meng, Vilas Sridharan, Xun Jian:
Nonblocking Memory Refresh. ISCA 2018: 588-599 - [c9]Da Zhang, Vilas Sridharan, Xun Jian:
Exploring and Optimizing Chipkill-Correct for Persistent Memory Based on High-Density NVRAMs. MICRO 2018: 710-723 - 2017
- [b1]Xun Jian:
Common-case optimized memory hierarchy for data centers and HPC systems. University of Illinois Urbana-Champaign, USA, 2017 - [c8]Xun Jian, Pavan Kumar Hanumolu, Rakesh Kumar:
Understanding and Optimizing Power Consumption in Memory Networks. HPCA 2017: 229-240 - 2016
- [c7]Xun Jian, Vilas Sridharan, Rakesh Kumar:
Parity Helix: Efficient protection for single-dimensional faults in multi-dimensional memory systems. HPCA 2016: 555-567 - [c6]Henry Duwe, Xun Jian, Daniel Petrisko, Rakesh Kumar:
Rescuing Uncorrectable Fault Patterns in On-Chip Memories through Error Pattern Transformation. ISCA 2016: 634-644 - 2015
- [c5]Henry Duwe, Xun Jian, Rakesh Kumar:
Correction prediction: Reducing error correction latency for on-chip memories. HPCA 2015: 463-475 - 2014
- [c4]Xun Jian, Rakesh Kumar:
ECC Parity: A Technique for Efficient Memory Error Resilience for Multi-Channel Memory Systems. SC 2014: 1035-1046 - 2013
- [j1]Xun Jian, John Sartori, Henry Duwe, Rakesh Kumar:
High Performance, Energy Efficient Chipkill Correct Memory with Multidimensional Parity. IEEE Comput. Archit. Lett. 12(2): 39-42 (2013) - [c3]Xun Jian, Rakesh Kumar:
Adaptive Reliability Chipkill Correct (ARCC). HPCA 2013: 270-281 - [c2]Xun Jian, Nathan DeBardeleben, Sean Blanchard, Vilas Sridharan, Rakesh Kumar:
Analyzing Reliability of Memory Sub-systems with Double-Chipkill Detect/Correct. PRDC 2013: 88-97 - [c1]Xun Jian, Henry Duwe, John Sartori, Vilas Sridharan, Rakesh Kumar:
Low-power, low-storage-overhead chipkill correct via multi-line error correction. SC 2013: 24:1-24:12
Coauthor Index
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