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Rong-Sing Chu

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2010 – 2019

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2014
[c1]
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  - conf/iscas/LeeCCCGH14
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  - https://dblp.org/rec/conf/iscas/LeeCCCGH14
Yen-Long Lee, Soon-Jyh Chang, Rong-Sing Chu, Yen-Chi Chen, Jih Ren Goh, Chung-Ming Huang:
An area- and power-efficient half-rate clock and data recovery circuit. ISCAS 2014: 2129-2132
2012
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Ya-Ting Shyu, Ying-Zu Lin, Rong-Sing Chu, Guan-Ying Huang, Soon-Jyh Chang:
A Low-Cost Bit-Error-Rate BIST Circuit for High-Speed ADCs Based on Gray Coding. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 95-A(12): 2415-2423 (2012)

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