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Moataz Abdelfattah
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2010 – 2019
- 2018
- [j2]Moataz Abdelfattah, Gordon W. Roberts:
Cascade and LC Ladder-Based Filter Realizations Using Synchronous Time-Mode Signal Processing. IEEE Trans. Very Large Scale Integr. Syst. 26(9): 1788-1801 (2018) - [c8]Moataz Abdelfattah, Muhammad Swilam, Brian Dupaix, Dale Shane Smith, Ayman A. Fayed, Waleed Khalil:
An on-chip resonant-gate-drive switched-capacitor converter for near-threshold computing achieving 70.2% efficiency at 0.92A/mm2 current density and 0.4V output. ISSCC 2018: 438-440 - 2017
- [j1]Moataz Abdelfattah, Gordon W. Roberts:
All-Digital Time-Mode Direct-Form All-Pole Biquadratic Filter Realization. IEEE Trans. Circuits Syst. II Express Briefs 64-II(11): 1262-1266 (2017) - 2016
- [c7]Moataz Abdelfattah, Gordon W. Roberts:
Experimental operation of time-mode building blocks using a time-mode switched-delay unit. MWSCAS 2016: 1-4 - 2015
- [c6]Moataz Abdelfattah, Brian Dupaix, Syed R. Naqvi, Waleed Khalil:
A fully-integrated switched capacitor voltage regulator for near-threshold applications. ISCAS 2015: 201-204 - 2014
- [c5]Moataz Abdelfattah, Gordon W. Roberts, Vamsy P. Chodavarapu:
All-digital Time-Mode elliptic filters based on the operational simulation of LC ladders. ISCAS 2014: 2125-2128 - [c4]Moataz Abdelfattah, Syed Roomi Naqvi, Brian Dupaix, Waleed Khalil:
Tracking energy efficiency of near-threshold design using process variation control techniques. NEWCAS 2014: 233-236 - 2012
- [c3]Moataz Abdelfattah, Maged Ghoneima, Yehea I. Ismail, Amr Lotfy, Mohamed Abdel-moneum, Nasser A. Kurd, Greg Taylor:
Modeling the response of Bang-Bang digital PLLs to phase error perturbations. CICC 2012: 1-4 - [c2]Moataz Abdelfattah, Ahmed Nader Mohieldin, Ahmed Emira, Ahmed K. Hussien, Edgar Sánchez-Sinencio:
Ultra-low-voltage power management unit for thermal energy harvesting applications. NEWCAS 2012: 381-384 - [c1]Moataz Abdelfattah, Maged Ghoneima, Yehea I. Ismail, Amr Lotfy, Mohamed Abdelsalam, Mohamed Abdel-moneum, Nasser A. Kurd, Greg Taylor:
A novel digital loop filter architecture for bang-bang ADPLL. SoCC 2012: 45-50
Coauthor Index
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