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ORCIDGiovanni Staino
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2000 – 2009
- 2009
[c6]Aakash Jain, Giovanni Staino, Pasquale Corsonello
:
Quad-Port Memory Blocks in Radiation-Tolerant FPGAs: An Application for Image Processing Systems. ICETET 2009: 368-371- 2007
- [c5]Pasquale Corsonello, Stefania Perri, Giovanni Staino, Marco Lanuzza, Giuseppe Cocorullo:
Design and Implementation of a 90nm Low bit-rate Image Compression Core. DSD 2007: 383-389 - 2006
- [j1]Pasquale Corsonello, Stefania Perri, Giovanni Staino, Marco Lanuzza, Giuseppe Cocorullo:
Low bit rate image compression core for onboard space applications. IEEE Trans. Circuits Syst. Video Technol. 16(1): 114-128 (2006) - 2003
- [b1]Giovanni Staino:
CARMEN: cellular automata reconfigurable machine for effective computation. University of Calabria, Italy, 2003 - [c4]Stefania Perri, Pasquale Corsonello, Giovanni Staino:
A low-power sub-nanosecond standard-cells based adder. ICECS 2003: 296-299 - 2002
- [c3]Pasquale Corsonello, Giandomenico Spezzano, Giovanni Staino, Domenico Talia:
Efficient Implementation of Cellular Algorithms on Reconfigurable Hardware. PDP 2002: 211-218 - 2001
- [c2]Stefania Perri, Pasquale Corsonello, Giuseppe Cocorullo, Gregorio Cappuccino, Giovanni Staino:
VLSI implementation of a fully static CMOS 56-bit self-timed adder using overlapped execution circuits. ICECS 2001: 723-727 - [c1]Gregorio Cappuccino, Pasquale Corsonello, Giuseppe Cocorullo, Stefania Perri, Giovanni Staino:
Dynamic power of CMOS gates driving lossy transmission lines. ICECS 2001: 1579-1582
Coauthor Index
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