Bevan M. Baas

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Bin Liu 0037

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Publications

2017
[j22]
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  - journals/jssc/BohnenstiehlSPA17
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  - https://dblp.org/rec/journals/jssc/BohnenstiehlSPA17
Brent Bohnenstiehl, Aaron Stillmaker, Jon J. Pimentel, Timothy Andreas, Bin Liu, Anh Tran, Emmanuel Adeagbo, Bevan M. Baas:
KiloCore: A 32-nm 1000-Processor Computational Array. IEEE J. Solid State Circuits 52(4): 891-902 (2017)
[j21]
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  - journals/micro/BohnenstiehlSPA17
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Brent Bohnenstiehl, Aaron Stillmaker, Jon J. Pimentel, Timothy Andreas, Bin Liu, Anh Tran, Emmanuel Adeagbo, Bevan M. Baas:
KiloCore: A Fine-Grained 1, 000-Processor Array for Task-Parallel Applications. IEEE Micro 37(2): 63-69 (2017)
2016
[c34]
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  - conf/hotchips/BohnenstiehlSPA16
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Brent Bohnenstiehl, Aaron Stillmaker, Jon J. Pimentel, Timothy Andreas, Bin Liu, Anh Tran, Emmanuel Adeagbo, Bevan M. Baas:
KiloCore: A 32 nm 1000-processor array. Hot Chips Symposium 2016: 1-23
[c33]
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  - conf/vlsic/BohnenstiehlSPA16
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Brent Bohnenstiehl, Aaron Stillmaker, Jon J. Pimentel, Timothy Andreas, Bin Liu, Anh Tran, Emmanuel Adeagbo, Bevan M. Baas:
A 5.8 pJ/Op 115 billion ops/sec, to 1.78 trillion ops/sec 32nm 1000-processor array. VLSI Circuits 2016: 1-2
2015
[c30]
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  - conf/mwscas/LiuFGB15
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Bin Liu, Mohammad H. Foroozannejad, Soheil Ghiasi, Bevan M. Baas:
Optimizing power of many-core systems by exploiting dynamic voltage, frequency and core scaling. MWSCAS 2015: 1-4
2014
[c28]
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  - conf/acssc/LiuBB14
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Bin Liu, Brent Bohnenstiehl, Bevan M. Baas:
Scalable hardware-based power management for many-core systems. ACSSC 2014: 1834-1838
2013
[j15]
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  - journals/tc/LiuB13
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Bin Liu, Bevan M. Baas:
Parallel AES Encryption Engines for Many-Core Processor Arrays. IEEE Trans. Computers 62(3): 536-547 (2013)
2011
[c24]
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  - conf/acssc/LiuB11
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Bin Liu, Bevan M. Baas:
A high-performance area-efficient AES cipher on a many-core platform. ACSCC 2011: 2058-2062

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