Yan Wang 0023

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Xiaosen Liu

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Publications

2024
[j32]
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Sen Yin, Ruitao Wang, Jian Zhang, Xiaosen Liu, Yan Wang:
Automatic Design for W-Band Front-End System via Bottom-Up Sizing and Layout Generation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(3): 705-715 (2024)
[c59]
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Zhikai Wang, Jingbo Zhou, Xiaosen Liu, Yan Wang:
An Efficient Transfer Learning Assisted Global Optimization Scheme for Analog/RF Circuits. ASPDAC 2024: 417-422
[c58]
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Xichen Sun, Jingshu Yu, Xuliang Wang, Jin Wei, Junmin Jiang, Chenchang Zhan, Yan Wang, Xiaosen Liu:
A 92%-Efficiency 0.828μs Settling Time FC5L Voltage Regulator Featuring Time-Domain Charge Balancing & Flying Capacitor Self-Switching for Wide Dynamic Range & Fast Transient Chiplet Applications. CICC 2024: 1-2
[c57]
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Zhikai Wang, Zuochang Ye, Jingbo Zhou, Xiaosen Liu, Yan Wang:
A Two-step Fine-tuning Assisted Layout Sizing Scheme for Analog/RF Circuits. ISCAS 2024: 1-5
2023
[j29]
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Sen Yin, Ruitao Wang, Jian Zhang, Xiaosen Liu, Yan Wang:
Fast Surrogate-Assisted Constrained Multiobjective Optimization for Analog Circuit Sizing via Self-Adaptive Incremental Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(7): 2080-2093 (2023)

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