Wolfgang Ecker

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Rainer Findenig

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Publications

2017
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Keerthikumara Devarajegowda, Johannes Schreiner, Rainer Findenig, Wolfgang Ecker:
Python based framework for HDSLs with an underlying formal semantics: (Invited paper). ICCAD 2017: 1019-1025
2016
[c70]
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  - conf/hldvt/SchreinerFE16
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Johannes Schreiner, Rainer Findenig, Wolfgang Ecker:
Design centric modeling of digital hardware. HLDVT 2016: 46-52
2013
[c55]
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  - conf/eurocast/FindenigLE13
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Rainer Findenig, Thomas Leitner, Wolfgang Ecker:
Transaction-Level Modeling and Refinement Using State Charts. EUROCAST (1) 2013: 134-141
2012
[c49]
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  - conf/hldvt/FindenigLE12
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Rainer Findenig, Thomas Leitner, Wolfgang Ecker:
Single-source hardware modeling of different abstraction levels with State Charts. HLDVT 2012: 41-48
2010
[c45]
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  - conf/hldvt/FindenigLVE10
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Rainer Findenig, Thomas Leitner, Michael Velten, Wolfgang Ecker:
Fast and accurate UML State Chart modeling using TLM⁺ control flow abstraction. HLDVT 2010: 97-102
[c44]
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  - conf/hldvt/EckerEFSV10
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Wolfgang Ecker, Volkan Esen, Rainer Findenig, Thomas Steininger, Michael Velten:
Model reduction techniques for the formal verification of hardware dependent software. HLDVT 2010: 148-153
[c43]
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  - conf/issoc/FindenigE10
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Rainer Findenig, Wolfgang Ecker:
State chart refinement validation from approximately timed to cycle callable models. SoC 2010: 72-75

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